- OCPU: a novel CPU architecture designed for low-power and large IPC values based on a graph-cover algorithm.
- OMPchip: 1K core shared memory chip for embedded systems.
- PPL1: strategies to partition global data-structures and objects in parallel programs (more theoretical)
- fastHLS: A new type of highlevel synthesis tool (compiling C to Verilog) that is based on a graph-cover algorithm.
- VP: develop a compiler optimization based on Value Prediction, i.e., using machine learning techniques to predict expected values of variables and use them to speedup the execution of programs.
- OpenMP Meter: develop a tool that, for a given code segment can statically determine how efficient it is as a parallel program (main work is to study models for predicting cache miss-predictions)
- OCA: Optimizing code advisor a tool to locate potential opportunities to parallelize sequential loops (Join with Gadi Haber from Intel).
- Source Level Compiler: developing a compiler that generates code by syntax transformations alone.
- PPL1: strategies to partition global data-structures and objects in parallel programs (more theoretical)
- RMPGA: Fast execution of boolean circuits on the reconfigurable mesh (more theoretic).